View CXA2647_144488.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

CXA2647N
RF Signal Processor for CD Players
Description The CXA2647N is an RF signal processing IC for compact disc players. Features * RF signal processor supporting 6x speed CD * RF system VCA circuit * RF system equalizer * Supports pickups with built-in RF summing amplifier * Low current consumption mode (RF off mode) * ROM/RW switching mode * Center error amplifier * Output DC level shift circuit * TE balance adjustment function Functions * RF AC summing amplifier, equalizer, VCA * RF DC summing amplifier * Focus error amplifier * Tracking error amplifier * Center error amplifier * Automatic power control * VC buffer amplifier (analog block, digital block) Pin Configuration
DC_OFST TE_BAL
30 pin SSOP (Plastic)
Absolute Maximum Ratings 7 * Supply voltage VCC * Storage temperature Tstg -65 to +150 * Allowable power dissipation PD 620
V C mW
Operating Conditions * Operating supply voltage range VCC - GND 3.0 to 3.6 V DVCC - GND 3.0 to 3.6 V (0V VCC - DVCC < 2V) * Operating temperature Topr -30 to +85 C
RFDCI
RFDC
RFG
RFC
VFC
BST
VCC
CEI
FEI 17 14 DVC
VC
CE
TE
30
29
28
27
26
25
24
23
22
21
20
19
18
16
1 LD
2 PD
3 EQ_IN
4 AC_SUM
5 GND
6 A
7 B
8 C
9 D
10 E
11 F
12 SW
13 DVCC
15 RFAC
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
-1-
FE
E01997-PS
CXA2647N
Block Diagram
AC_SUM
EQ_IN
4
3
23
24
25
26 RF off at VCC
RFC
15
AC_SUM
VCA
EQ 30 DC_OFST
ROM/ RW A 6 ROM/ RW VC VOFST VC C 8 ROM/ RW
RFAC
RFG
VFC
BST
29 RFDCI 28 RFDC
B
7
21 CEI
D
9 DVC ROM/ RW VC VOFST ROM/ RW
20
CE
17 FEI
ROM/ RW
DVC VC
16
FE
19 VOFST F 11 gm VC E 10 gm VC L: ROM DVC H: RW VC DVC or Hi-Z Sleep, APC off VCC ROM/ RW VC VOFST VC VCC DVC ROM/ RW 18
TE_BAL
TE
L or H SW 12
13 DVCC
PD
2
APC
LD
1 5 GND 22 VCC 27 VC 14 DVC
-2-
CXA2647N
Pin Description Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 Symbol LD PD EQ_IN AC_SUM GND A B C D E F SW DVCC DVC RFAC FE FEI TE TE_BAL CE CEI VCC RFG BST VFC RFC VC RFDC RFDCI DC_OFST I/O O I I O I I I I I I I I I O O O I O I O I I I I I I O O I I APC amplifier output. APC amplifier input. RFAC system VCA block and EQ block input. RFAC system RF_SUM output. GND. Signal A input. Signal B input. Signal C input. Signal D input. Signal E input. Signal F input. Mode switching signal input. DVCC. DVC output. RFAC signal output. Focus error signal output. FE amplifier virtual ground. Tracking error signal output. TE balance adjustment. Center error signal output. CE amplifier virtual ground. VCC. RFAC system VCA block low frequency gain adjustment. EQ boost level adjustment. EQ cut-off frequency adjustment. EQ cut-off frequency adjustment. VC voltage output. RFDC signal output. RFDC amplifier virtual ground. RFDC signal output offset adjustment. Description
-3-
CXA2647N
Pin Description Pin No. Symbol I/O Equivalent circuit Description
600A 100A 10k
1
LD
O
1 1k
APC amplifier output.
10A 20A 10A
2
PD
I
2
55k 20k
APC amplifier input.
20k
3
EQ_IN
I
3 5k VC
1.2k
Equalizer circuit input.
VC
400A 400A
3.4k
4
AC_SUM
O
2k
50 4
RFAC summing amplifier output.
400A 400A 500A
5
GND
--
--
GND.
-4-
CXA2647N
Pin No.
Symbol
I/O
Equivalent circuit
Description
6
A
I
6 100A
10k 10k
100A 7
400A
7
B
I
100A 30k
8
100A 47k
47k
RFAC summing amplifier, RFDC amplifier, focus error amplifier and center error amplifier input.
100A
50A
8
C
I
9 100A 30k
VC
24k
9
D
I
24k VC 50A 100A
10
E
I
10 11
Tracking error amplifier input.
100A VC
11
F
I
200k 200k 12 200k VC
12
SW
I
CD-ROM/SLEEP/CD-RW switching input. ROM when connected to GND, RW when connected to DVCC, SLEEP mode when connected to DVC or Hi-Z. Digital power supply.
13
DVCC
--
--
14
DVC
O
100 14 100 25
(DVCC + GND)/2 voltage output.
-5-
CXA2647N
Pin No.
Symbol
I/O
Equivalent circuit
Description
15
RFAC
O
1.4mA 100
15
RFAC amplifier output.
16
FE
O
50k VC 124 16
Focus error amplifier output.
50A
500A
124 17
17
FEI
I
Focus error amplifier gain adjustment. The gain is adjusted by the external resistance value connected between this pin and Pin 16.
18
TE
O
100A
18 63k 500A
Tracking error amplifier output.
45k 19
19
TE_BAL
I
5k 50A VC
Input for adjusting the tracking error amplifiers E and F gain balance with the control voltage.
20
CE
O
50k VC 124 20
Center error amplifier output.
50A
500A
124 21
21
CEI
I
Center error amplifier gain adjustment. The gain is adjusted by the external resistance value connected between this pin and Pin 20.
-6-
CXA2647N
Pin No. 22
Symbol VCC
I/O --
Equivalent circuit -- VCC.
Description
19.5k
23
RFG
I
23 VC 100A
Input for setting the RFAC low frequency gain with the control voltage.
50A
24
BST
I
20k 24 VC 25A
Input for adjusting the equalizer circuit boost level with the control voltage.
19k
25
VFC
I
25 VC 100A
Input for adjusting the equalizer circuit cut-off frequency with the control voltage.
10A 124
1.5V
26
RFC
I
26
Input for adjusting the equalizer circuit cut-off frequency with the external resistance.
27
VC
O
100 27 100 25
(VCC + GND)/2 voltage output.
-7-
CXA2647N
Pin No.
Symbol
I/O
Equivalent circuit
Description
28
RFDC
O
2k
100A
250A 124 VC 1mA 28
RFDC amplifier output.
124
29
RFDCI
I
29
RFDC amplifier gain adjustment. The gain is adjusted by the external resistance value connected between this pin and Pin 28.
24k 30
30
DC_OFST
I
15k
VC 10k 100A 400A
Input for adjusting RFDC amplifier offset with the control voltage.
-8-
CXA2647N
Description of Functions * RFAC The RF signal input by connecting capacitance to EQ_IN (Pin 3) is equalized, arithmetically amplified and then output from RFAC (Pin 15).
A B C D AC_SUM 6 7 8 9 4 AC SUM Amp VCC
100k BST VFC 24 25 26 RFC
3 EQ_IN RFG 23
VCA
EQ RFAC OFF when BST = VCC
Amp
15 RFAC
ROM/RW Control Bias VC - 1V to VC + 1V
Low frequency gain (100kHz) AC_SUM (ABCD to AC_SUM) 13dB RFAC (EQ_IN to RFAC) ROM: 1.5dB RW: 13.5dB
When BST (Pin 24) is connected to VCC, the RFAC function is turned off and the low consumption mode is entered. If RF (summing signal) is present at the pickup output pin, input the addition output signal to EQ_IN (Pin 3) coupled by capacitance. When using a pickup without a summing output function, perform addition with the AC_SUM and then input the signal to EQ_IN (Pin 3) coupled by capacitance. ROM/RW switching is done by the VCA block, so either input method can be used without problem. The RW gain is 12dB higher than the ROM gain.
Gain [dB] VCA variable range
The VCA low frequency gain can be adjusted by the RFG (Pin 23) voltage control. The control voltage vs. low frequency gain characteristics are shown in the graph to the right.
8 0 -8 Vcnt [V]
VC - 1
VC
VC + 1
The RFAC pin (Pin 15) is an NPN transistor emitter follower output. The maximum drive current is approximately 1.4mA. If the load capacitance distorts the output waveform, connect resistance between the RFAC pin and GND to increase the drive current. -9-
CXA2647N
* EQ The EQ internal block diagram is shown below. The EQ is configured with the filter of the Bessel function of order 4. Boost 79.517fc2 Control LPF1 = 2 + (17.085fc) S + 79.517fc2 S 24 BST
In HPF1 Amp Control Bias VC - 1V to VC + 1V
HPF1 =
S2 S2 + (17.085fc) S + 79.517fc2 99.963fc2 S2 + (12.412fc) S + 99.963fc2
LPF2 =
LPF1 LPF2 Out
fc Control RFC 26 33k to 100k 25 VFC Control Bias VC - 1V to VC + 1V
The boost gain can be adjusted by adjusting the HPF1 gain. The cut-off frequency is adjusted by the RFC external resistance value and the VFC control voltage value. RFC resistance value: The cut-off frequency fc of each filter is adjusted by the Pin 26 external resistance value. The VFC voltage can be varied using this fc as the reference. VFC voltage: fc can be adjusted by the voltage applied to Pin 25. The cut-off frequency control characteristics are shown in the graph below.
1.5fc
The boost gain can be adjusted by the BST (Pin 24) control voltage. The control characteristics are shown in the graph below. The boost gain stands for the increased gain from the low frequency gain in the fc frequency.
Gain 8dB Boost gain [dB] 5dB Boost gain
fc [Hz]
fc Freq.
fc
0.5fc -1dB VC - 1.0 VC - 1.0 VC VC + 1.0 BST voltage [V] VC VC + 1.0 VFC voltage [V]
* APC (Automatic Power Control)
RFC pin external resistor value 100k: fc = 1.6MHz 33k: fc = 4.8MHz
When the laser diode is driven by a constant current, the optical power output has extremely large negative temperature characteristics. Therefore, the current must be controlled to maintain the monitor photodiode output at a constant level. This control is performed by the APC function.
VCC 56k PD 2 10k 55k 10k 10k 1.25V 56k 1 LD 1k
- 10 -
CXA2647N
* Focus Error The signals input to the A and C pins and the B and D pins are arithmetically amplified and the focus error signal is output. This circuit has ROM/RW switching and offset addition functions.
VC ROM 23.5k A6 C8 B7 D9 ROM VOFST 30k 30k 30k ROM 30k 47k 47k 200k RW DVC RW FEI 17 100k 124 50k 124 16 FE 100k
RW 200k FE = Gain { (B + D) - (A + C) } Low frequency gain ROM: 15.5dB RW: 27.5dB Cut-off frequency fc (typ.) ROM: 400kHz RW: 300kHz
* Tracking Error The signals input to the E and F pins are arithmetically amplified and the tracking error signal is output. This circuit has ROM/RW switching and offset addition functions.
VC Control bias VC - 1V to VC + 1V TE_BAL 19 ROM VOFST 20k 11 20k 10 F VC gm RW 20k 20k VC 31.5k ROM VC 251k 10k 251k RW 18 TE gm 10k 125.5k RW TE balance adjustment (F - E) low frequency gain = 6dB Cut-off frequency fc (typ.) ROM: 200kHz RW: 150kHz 63k 63k ROM
TE = Gain (F - E) Low frequency gain ROM: 16dB RW: 28dB
E
External resistance value vs. Low frequency gain for E and F input pins
Low frequency gain [dB]
22
15.5
12.5
10k
20k Resistance value []
30k
- 11 -
CXA2647N
* VC Buffer This outputs the VC ((1/2) VCC) voltage. The maximum output current is approximately 3mA. Use this voltage as the analog block VC voltage.
VCC
* DVC Buffer This outputs the DVC ((1/2) DVCC) voltage. The maximum output current is approximately 3mA. Use this voltage as the digital block VC voltage. The each output DC voltage of FE, TE and CE is level shifted using the DVC voltage as the reference.
DVCC
40k VC 27 25 40k DVC 14 25
40k
40k
* RFDC The signals input to the A, B, C and D pins are added, amplified and the RFDC signal is output. ROM/RW switching, low frequency gain adjustment and output DC voltage adjustment are possible.
VC Control bias VC - 1V to VC + 1V
30 ROM 24k A6 B7 C8 D9 ROM VC RW 15k 15k 15k 15k 2.4k 3.3k
RW 96k 10k ROM 40k RW 124 2k 124 RFDCI 29 5.1k 28 RFDC
VC
RFDC = Gain (A + B + C + D) Low frequency gain ROM: 16.5dB RW: 28.5dB
Cut-off frequency fc (typ.) ROM : 15MHz RW : 6MHz
The gain can be adjusted by the external resistance connected between Pins 28 and 29. The output voltage offset can be adjusted by controlling the Pin 30 voltage.
- 12 -
CXA2647N
* Center Error The signals input to the A and D pins and the B and C pins are arithmetically amplified and the center error signal is output. ROM/RW switching and offset addition functions are incorporated.
VC ROM 12k A6 D9 B7 C8 ROM VOFST RW 30k 30k 30k ROM 30k 24k 96k Cut-off frequency fc (typ.) ROM: 200kHz RW: 200kHz 24k 96k RW DVC RW 48k CEI 21 50k 124 200k 20 CE 124
CE = Gain {(B + C) - (A + D)} signal is arithmetically amplified. Low frequency gain ROM: 15.5dB RW: 27.5dB
* Output DC Level Shift The FE, TE and CE output DC voltages are level shifted to the digital VC voltage (DVC). The reference voltage of this IC is the VC voltage, and only the output reference voltage changes. The maximum output voltage of each output signal should be kept to the digital VCC voltage (DVCC) or less in order to protect the DSP IC. The VC and DVC voltages are arithmetically amplified 30k and output as the VOFST voltage. 30k The VOFST voltage serves as the level shift reference DVC VOFST voltage, and is distributed to each block. VC 15k VOFST = 2VC -DVC * SW This controls the laser (APC) on/off, active/sleep mode, and ROM/RW mode switching. Switching is controlled by the voltage applied to the SW pin.
Active/Sleep SW 12 SW ROM/RW APC ON/OFF
SW low/high condition Low: GND to DVC - 1.2V High: DVC + 1.2V to Vcc
Status of Functions on SW Switching
Control voltage
Item VCC
APC ON OFF ON
Active/Sleep Active Sleep Active
ROM/RW RW -- ROM - 13 -
VC or Hi-Z GND
The VC buffer is always in active mode even if it enters sleep mode. In the function block, MODE SW is always set to active mode.
Electrical Characteristics
Switch conditions
Measurement pin
(VCC = 1.5V, VEE = -1.5V, DVCC = 1.5V, DVEE = -1.5V)
Bias conditions E3 0V 1.5V 22 13 22 4 OOOO 0.1Vp-p 100kHz 0.1Vp-p 10MHz 0.35V -0.15V 0V O O O O O O O O O O O O O OO OO O O O O O 75mVp-p 100kHz 0.8Vp-p 100kHz 0.4Vp-p 800kHz 0.4Vp-p 2.4MHz 0.4Vp-p 7.2MHz 70mVp-p 1.6MHz 0.2Vp-p 1.6MHz 0.85V -0.85V 1.0V -1.0V 0V O 0.2Vp-p 100kHz O 0.35Vp-p 100kHz 0.3Vp-p 100kHz 0.8Vp-p 100kHz 1.4Vp-p 100kHz -1.0V 0V 1.0V -1.0V 0V 1.0V 0V 1.0V -1.0V 1.0V 1.0V 0V 4 4 15 15 4 OOOO OOOO OOOO 4 Pin voltage 20 log (Vout/Vin) 20 log (Vout/Vin) - Gsum Pin current Pin current Pin current 7 0V O 0V 0V 0V 0V 22 Pin current 18 0V 30 12 E19 E23 E24 E25 E30 Measurement conditions Min. Typ. Max. Unit V3 V3 S1 S3-1 S3-2 S6 S7 S8 S9 S10 S11 S12-1 S12-2 S26 S27 amplitude frequency E2 0V
Measure- Funcment No. tion
Measurement item
Symbol
1
Current consumption (Active, RF On) Icc_ARFon
42 mA 17 mA
2
Current consumption (Active, RF Off) Icc_ARFoff
3
Current consumption (DVCC)
Icc_Dvcc
0.2 0.7 1.2 mA 1.8 3 4.2 mA -0.95 -0.55 -0.15 V 11 13 15 dB -2.5 -0.5 0.5 dB
4
Current consumption (Sleep)
Icc_Slp
5
SUM offset voltage
ACSUM_Ofst
6
SUM low frequency gain
Gsum
8
RFAC SUM
7
SUM frequency response Fsum
SUM maximum output voltage H Vsum_H
Pin voltage - ACSUM_Ofst 1.15 1.35 1.55
V Pin voltage - ACSUM_Ofst -0.55 -0.35 -0.15 V Pin voltage Pin voltage -0.45 -0.05 0.35 -0.45 -0.05 0.35 15 20 log (Vout/Vin) - Gac_ROM2 -10 15 20 log (Vout/Vin) 15 20 log (Vout/Vin) - Gac_ROM2 -2 6 15 20 log (Vout/Vin) - Gac_RW2 - Gac_ROM2 -10 15 20 log (Vout/Vin) - Gac_ROM2 15 20 log (Vout/Vin) - Gac_RW2 - Gac_ROM2 15 20 log (Vout/Vin) 15 20 log (Vout/Vin) - Gac_ROM2 15 20 log (Vout/Vin) - Gac_ROM2 15 20 log (Vout/Vin) - Gac_HiFc 10 6 -2 3 3 3 15 20 log (Vout/Vin) - Gac_RW2 - Gac_ROM2 6.5 -8 1.5 8 -8 12 8 1.5 5 5 5 -6 5 10 -6 14 10 5 7 7 7 V V dB dB dB dB dB dB dB dB dB dB 8.5 10.5 dB 15 20 log (Vout/Vin) - Gac_RW2 - Gac_ROM2 -2.5 -0.5 1.5 dB 15 Pin voltage - AC_OfstROM 0.65 0.85 1.05 V 15 Pin voltage - AC_OfstROM -0.95 -0.75 -0.55 V
9
SUM maximum output voltage L Vsum_L
10
Offset voltage ROM
AC_OfstROM
11
Offset voltage RW
AC_OfstRW
RFAC EQ
- 14 -
12
Low frequency gain ROM_min Gac_ROM1
13
Low frequency gain ROM_cnt Gac_ROM2
14
Low frequency gain ROM_max Gac_ROM3
15
Low frequency gain RW_min
Gac_RW1
16
Low frequency gain RW_cnt Gac_RW2
17
Low frequency gain RW_max Gac_RW3
18
Low frequency gain RF_HiFc Gac_HiFc
19
Frequency response Min_L
Fac_MinL
20
Frequency response Min_H Fac_MinH
21
Frequency response RF_HiFc Fac_HiFcf
22
Boost response BST_H
Fac_BSTH
23
Boost response BST_L
Fac_BSTL
24
Maximum output voltage H Vac_H
CXA2647N
25
Maximum output voltage L Vac_L
Switch conditions
Measurement pin
Bias conditions E3 0V 28 50mVp-p 100kHz 28 28 28 28 0.13V -0.25V 0V 28 -0.5V 28 0V O 16 16 0.1Vp-p 1kHz 1kHz 16 16 16 16 16 16 16 16 0.18V 0.18V 16 16 28 O 50mVp-p 10MHz O 12.5mVp-p 3MHz 12.5mVp-p 100kHz 20 log (Vout/Vin) Pin voltage -120 0 0V 0V 28 Pin voltage -120 0 0V 0V 0V E19 E23 E24 E25 E30
Measurement conditions
Measure- Funcment No. tion
Measurement item V3 V3 S1 S3-1 S3-2 S6 S7 S8 S9 S10 S11 S12-1 S12-2 S26 S27 amplitude frequency E2 0V O OOOO OOOO OOOO OOOO OOOO OOOO
Symbol
Min. Typ. Max. Unit
26
Offset voltage ROM
DC_OfstROM
120 mV 120 mV
27
Offset voltage RW
DC_OfstRW
28
Low frequency gain ROM Gdc_ROM
13.5 16.5 19.5 dB 12 13 dB
29
Low frequency gain RW
Gdc_RW
20 log (Vout/Vin) - Gdc_ROM 11
RFDC
30
Frequency response ROM Fdc_ROM
20 log (Vout/Vin) - Gdc_ROM -3 -0.5 0.5 dB 20 log (Vout/Vin) - Gdc_RW _Gdc_ROM Pin voltage Pin voltage Pin voltage Pin voltage Pin voltage 20 log (Vout/Vin) 20 log (Vout/Vin) -3 -0.5 0.5 dB 0.35 0.55 0.75 V -1.5 -1.3 -1.1 V -0.67 -0.55 -0.43 V -120 0 -120 0 120 mV 120 mV 12.5 15.5 18.5 dB 12.5 15.5 18.5 dB 20 log (Vout/Vin) - Gfe_ROM1 11 20 log (Vout/Vin) - Gfe_ROM2 11 12 12 13 13 20 log (Vout/Vin) - Gfe_ROM1 -2.5 -0.5 0.5 20 log (Vout/Vin) - Gfe_ROM2 -2.5 -0.5 0.5 20 log (Vout/Vin) - Gfe-RW1 -Gfe_ROM1 -2.5 -0.5 0.5 20 log (Vout/Vin) - Gfe_RW2-Gfe_ROM2 -2.5 -0.5 0.5 Pin voltage Pin voltage 0.75 1 1.45 dB dB dB dB dB dB V -1.45 -1 -0.75 V
31
Frequency response RW Fdc_RW
32
Maximum output voltage H Vdc_H
33
Maximum output voltage L Vdc_L
34
Offset voltage 1
DC_Ofst1
35
Offset voltage ROM
FE_OfstROM
36 O O O O O O O O O O O O O O O O O 0.1Vp-p 200kHz 25mVp-p 100kHz 25mVp-p 100kHz O 0.1Vp-p 200kHz O O 25mVp-p 1kHz O O 25mVp-p 1kHz O 0.1Vp-p O
Offset voltage RW
FE_OfstRW
FE
- 15 -
37
Low frequency gain ROM1 Gfe_ROM1
38
Low frequency gain ROM2 Gfe_ROM2
39
Low frequency gain RW1 Gfe_RW1
40
Low frequency gain RW2 Gfe_RW2
41
Frequency response ROM1
Ffe_ROM1
42
Frequency response ROM2
Ffe_ROM2
43
Frequency response RW1 Ffe_RW1
44
Frequency response RW2 Ffe_RW2
45
Maximum output voltage H Vfe_H
46
Maximum output voltage L Vfe_L
CXA2647N
Switch conditions
Measurement pin
Bias conditions E3 0V 18 Pin voltage 0.1Vp-p 1kHz 1kHz 18 20 log (Vout/Vin) 18 20 log (Vout/Vin) 13 13 -350 0 16 16 12 12 -1 -1 0V 0V 0V 0V 0V 18 Pin voltage -150 0 E19 E23 E24 E25 E30 Measurement conditions Min. Typ. Max. Unit 150 mV 350 mV 19 19 13 13 0 0 0 18 20 log (Vout/Vin) - Gte_RW2- Gte_ROM2 -3.5 -1.5 1.0V -1.0V 0.18V 0V 0.18V 0V O 18 E, F gain difference 18 E, F gain difference 18 Pin voltage 18 Pin voltage 20 Pin voltage 20 Pin voltage 0.1Vp-p 0.1Vp-p 1kHz 1kHz 20 20 log (Vout/Vin) 20 20 log (Vout/Vin) 4 -8 6 -6 0 8 -4 0.8 1.2 1.45 dB dB dB dB dB dB dB dB dB dB V -1.45 -1.2 -0.8 V -120 0 -120 0 120 mV 120 mV 12.5 15.5 18.5 dB 12.5 15.5 18.5 dB 20 20 log (Vout/Vin) - Gce_ROM1 11 20 20 log (Vout/Vin) - Gce_ROM2 11 25mVp-p 1kHz 0.1Vp-p 100kHz 0.1Vp-p 100kHz 12 12 13 13 dB dB 20 20 log (Vout/Vin) - Gce_ROM1 -2.7 -1.2 0.3 dB 20 20 log (Vout/Vin) - Gce_ROM2 -2.7 -1.2 0.3 dB O O 25mVp-p 100kHz 25mVp-p 100kHz 0.18V 20 20 log (Vout/Vin) - Gce_RW1- Gce_ROM1 -2.7 -1.2 0.3 dB 20 20 log (Vout/Vin) - Gce_RW2 - Gce_ROM2 -2.7 -1.2 0.3 dB 20 Pin voltage 0.75 1 1.45 V
Measure- Funcment No. tion
Measurement item V3 V3 S1 S3-1 S3-2 S6 S7 S8 S9 S10 S11 S12-1 S12-2 S26 S27 amplitude frequency E2 0V O O O O O O O O O OO OO O O 0.1Vp-p 10kHz 0.1Vp-p 10kHz O 25mVp-p 100kHz O 25mVp-p 100kHz 0.1Vp-p 100kHz 0.1Vp-p 100kHz O 25mVp-p 1kHz O 25mVp-p 1kHz 0.1Vp-p
Symbol
47
Offset voltage ROM
TE_OfstROM
48
Offset voltage RW
TE_OfstRW
49
Low frequency gain ROM1 Gte_ROM1
50
Low frequency gain ROM2 Gte_ROM2
51
Low frequency gain RW1 Gte_RW1
18 20 log (Vout/Vin) - Gte_ROM1 11 18 20 log (Vout/Vin) - Gte_ROM2 11 18 20 log (Vout/Vin) - Gte_ROM1 -3 18 20 log (Vout/Vin) - Gte_ROM2 -3
52
Low frequency gain RW2 Gte_RW2
54
TE
53
Frequency response ROM1
Fte_ROM1
Frequency response ROM2
Fte_ROM2
55
Frequency response RW1 Fte_RW1
18 20 log (Vout/Vin) - Gte_RW1- Gte_ROM1 -3.5 -1.5
56
Frequency response RW2 Fte_RW2
57
Balance gain 1
Gte1
58
Balance gain 2
Gte2
CE
- 16 -
O OO O OO O OO O OO OO O O O O O O O O 25mVp-p 1kHz 0.18V
59
Maximum output voltage H Vte_H
60
Maximum output voltage L Vte_L
61
Offset voltage ROM
CE_OfstROM
62
Offset voltage RW
CE_OfstRW
63
Low frequency gain ROM1 Gce_ROM1
64
Low frequency gain ROM2 Gce_ROM2
65
Low frequency gain RW1 Gce_RW1
66
Low frequency gain RW2 Gce_RW2
67
Frequency response ROM1
Fce_ROM1
68
Frequency response ROM2
Fce_ROM2
69
Frequency response RW1 Fce_RW1
70
Frequency response RW2 Fce_RW2
CXA2647N
71
Maximum output voltage H Vce_H
72
Maximum output voltage L Vce_L
20 Pin voltage
-1.45 -1 -0.75 V
Switch conditions
Measurement pin
Bias conditions E3 0V
Input at which output voltage = 0V
Measure- Funcment No. tion
Measurement item V3 V3 S1 S3-1 S3-2 S6 S7 S8 S9 S10 S11 S12-1 S12-2 S26 S27 amplitude frequency E2 E19 E23 E24 E25 E30 0V 1 1 1 1 O 27 14 Pin voltage Pin voltage Pin voltage Pin voltage Pin voltage Pin voltage 0.5 0.75 0V 0V 0V 0V 1 adj
Symbol
Measurement conditions Min. Typ. Max. Unit 50 150 250 mV 1 V V 1.25 1.45 1.5 -0.25 0.1 0.45 -50 -50 0 0 V V 50 mV 50 mV
73
Output voltage 1
Vapc1
74
Output voltage 2
Vapc2
APC
75 O 0V
Output voltage 3
Vapc3
Vapc1 + 20mV Vapc1 - 20mV
-1 -0.75 -0.5
76
APC OFF voltage
Vapc_off
77
Maximum output current
Iapc_max O
78
Output voltage
Vavc
DVC AVC
79
Output voltage
Vdvc
- 17 -
CXA2647N
CXA2647N
Electrical Characteristics Measurement Circuit
VCC
100k 5.1k E30 30 DC_OFST 29 RFDCI 28 RFDC 10k S27 27 VC S26 26 RFC
33k
VCC 200k 10k E19 20 CE 19 TE_BAL 18 TE 10k 100k 17 FEI 16 FE 15 10k DVCC DVC S12-1 DVC S12-2 FE OUT 16 FE 15 RFAC RFAC 10k
E25 E24 E23 25 24 23 22 VFC BST RFG VCC
21 CEI
AC_SUM
EQ_IN
DVCC 13 TE OUT 18 TE DVCC 13
GND
1 S1 E2 0.8mA
2 S3-1
3
4
5 10k VEE S6
6
7
8
9 20k
10
11 20k
12
14
S7
S8
S9
S10
S11
VEE VCC
S3-2
V3 E3 VEE DVCC
Application Circuit
RFDC OUT VC VCC VCC 0.1 VCC CE OUT VCC
VCC VCC
VCC
30 DC_OFST
29 RFDCI
28 RFDC
27 VC
26 RFC
25 VFC
24 BST
23 RFG
22 VCC
21 CEI
20 CE
19 TE_BAL
17 FEI 14 DVC
AC_SUM
EQ_IN
GND
1
2
3
4
5
6
7
8
9
10
11
12
LD PD IN Drive RF SUM
A
B
C
D
E
F
DVCC DVC MODE RFAC Control OUT
Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same.
- 18 -
SW
PD
LD
C
D
A
B
E
F
DVC
SW
PD
LD
C
D
A
B
E
F
CXA2647N
Connection Example of DP and DSP
VCC VCC
VCC
AC_SUM
VCC
<CXA2647N>
RFC RFAC
EQ_IN
RFG
VFC
BST

4 A B C D VC 3

23
24
25
26 RF off at VCC
25
RF AC_SUM VCA EQ 30 29 ROM/ RW VC VOFST VC 8 D VC D ROM/ RW 28 RFDCI RFDC
RFAC VCC DC_OFST ROM/ RW 6
A VC
A
B
B 7
RFDC
VC
C
C
21
CEI
9 ROM/ RW DVC VC VOFST ROM/ RW 17 FEI 20 CE CE
VC
ROM/ RW
DVC VC
16
FE VCC TE_BAL
FE
19 VOFST F VC E VC L or H SW 12 E 10 gm VC L: ROM DVC H: RW VC DVC or Hi-Z Sleep, APC off VCC VC 5 GND 22 VCC 27 VC 14 DVC ROM/ RW VC VOFST VC VCC DVC 13 F 11 gm VC ROM/ RW TE 18 TE
DVCC
VCC
PD GND VCC
2
APC
VC
LD
1
Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same.
- 19 -
CXA2647N
Characteristics Graphs 1. EQ characteristics
(Vcc = 3.0V, DVcc = 3.0V)
Input: Pin 3 EQ_IN Output: Pin 15 RFAC 1-2. EQ fc control characteristics
25 ROM mode Pin 26 RFC = 100k/33k Pin 25 VFC = control Pin 24 BST = VC Pin 23 RFG = VC RFC = 100k VFC = VC + 1V VFC = VC VFC = VC - 1V RFC = 33k VFC = VC VFC = VC + 1V
1-1. EQ ROM/RW characteristics
25 Pin 26 RFC = 100k Pin 25 VFC = VC Pin 24 BST = VC Pin 23 RFG = VC
20
20
15 RW 10 [dB] [dB] 5 ROM 0
15
10
5
0
-5
-5
-10 1k 10k 100k [Hz] 1M 10M
-10 10k
100k
1M [Hz]
10M
100M
1-3. EQ boost control characteristics
25 ROM mode Pin 26 RFC = 100k/33k Pin 25 VFC = VC Pin 24 BST = control Pin 23 RFG = VC 30
1-4. EQ gain control characteristics
20
25 RFG = VC + 1V RFC = 33k BST = VC + 1V BST = VC BST = VC - 1V [dB] 20
15
10 [dB]
5
RFC = 100k BST = VC + 1V BST = VC BST = VC - 1V
15
RFG = VC
10 RFG = VC - 1V RW mode Pin 26 RFC = 100k Pin 25 VFC = VC Pin 24 BST = VC Pin 23 RFG = control 1k 10k 100k [Hz] 1M 10M
0
5
-5
0
-10 10k
-5 100k 1M [Hz] 10M 100M
- 20 -
CXA2647N
2. AC_SUM characteristics Input: Pin 6, 7, 8, 9 A, B, C, D Output: Pin 4 AC_SUM
25 40
3. RFDC characteristics Input: Pin 6, 7, 8, 9 A, B, C, D Output: Pin 28 RFDC
Feed back registor 5.1k between Pin 28 & 29
20
35 RW
15
30
10 [dB] [dB] 5
25
20 ROM
0
15
-5
10
-10 10k
100k
1M [Hz]
10M
100M
5 10k
100k
1M [Hz]
10M
100M
3. FE characteristics Input: Pin 6, 8 A, C Output: Pin 16 FE
40 Feed back registor 100k between Pin 16 & 17 35 35 40
4. TE characteristics Input: Pin 10 E Output: Pin 18 TE
Input (Pin 10 & 11) registor 200k Pin 19 TE_BAL = VC
30
RW
30
RW
25 [dB] [dB] 20 ROM 15
25
20 ROM 15
10
10
5 1k 10k 100k [Hz] 1M 10M
5 1k 10k 100k [Hz] 1M 10M
- 21 -
CXA2647N
3. CE characteristics Input: Pin 6, 9 A, D Output: Pin 20 CE
40 Feed back registor 200k between Pin 20 & 21 35 3.0 3.5
3. APC input/output characteristics Input: Pin 2 PD Output: Pin 1 LD
VCC = 3.6V 30 RW Output LD [V] ROM 15 1.0 2.5
25 [dB]
2.0
20
1.5 VCC = 3.0V
10
0.5
5 1k 10k 100k [Hz] 1M 10M
0 0 0.05 0.1 Input PD [V] 0.15 0.2
- 22 -
CXA2647N
Package Outline
Unit: mm
30PIN SSOP (PLASTIC)
+ 0.2 1.25 - 0.1 9.7 0.1
0.10
30
16
5.6 0.1
A
1 b 0.13 M
15 0.65
b=0.22 0.03 0.1 0.1
0.5 0.2
DETAIL B : PALLADIUM
NOTE: Dimension "" does not include mold protrusion. 0 to 10
PACKAGE STRUCTURE
DETAIL A
PACKAGE MATERIAL SONY CODE EIAJ CODE JEDEC CODE SSOP-30P-L01 P-SSOP30-5.6x9.7-0.65 LEAD TREATMENT LEAD MATERIAL PACKAGE MASS EPOXY RESIN PALLADIUM PLATING COPPER ALLOY 0.1g
- 23 -
+ 0.03 0.15 - 0.01
7.6 0.2
Sony Corporation

▲Up To Search▲

Price & Availability of CXA2647

	To Download CXA2647 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .